Synchronization

Structure

The master sends the Sync Break Field onto the bus to clearly signal the beginning of a transmission to the slaves. This field is subdivided into the Sync Break and Sync Break Delimiter (see figure: Frame Header).

Oscillator tolerance

The Sync Break consists of at least thirteen dominant bits. Since cost-effective oscillators are used, the frequency may fluctuate by ±14 %. By transmitting at least 13 dominant bits, it is assured that a slow slave can also detect the start of a data transmission.

Sync Break

The Sync Break cannot be transmitted in any regular SCI Frame and it forms a unique bit sequence without start or stop bits. Since it is not all that easy to generate with the SCI, the master sends a SCI frame with the value 0x00 at a low transmission speed. This is often implemented by halving the typical transmission rate.

Sync Break Delimiter

While the Sync Break has at least thirteen dominant bits the Sync Break Delimiter has at least one and a maximum of four recessive bits (see figure: Frame Header). This separates the Sync Break from the Sync Field that follows it, which begins with a dominant start bit due to the use of the SCI for serial communication.

Sync Field

To ensure that all slaves send and receive at the same clock time, the master transmits the Sync Field after the Sync Break Field. The Sync Field contains the value 0x55. To derive the clock, the slaves measure the time between the first and last falling edge of the Sync Field and divide it by eight. The result corresponds to one bit time.


Last modified: Wednesday, 11 April 2018, 4:45 PM